Extreme ultraviolet (“EUV”) lithography is an emerging technology enabling the fabrication of semiconductor devices having critical dimensions less than 28 nanometers (nm) in width. In contrast to conventional lithographical techniques, EUV lithography utilizes extreme ultraviolet light to transfer a circuit layout pattern from a reflective EUV photomask (referred to herein as an “EUV mask” and also commonly referred to as a “reticle”) to a semiconductor die. In one common implementation, the EUV mask includes a substrate, a multi-layer (“ML”) reflector formed over the substrate, and an absorber stack formed over the ML reflector. The ML reflector and the absorber stack are tuned to be predominately reflective and absorptive, respectively, of extreme ultraviolet light at a chosen EUV wavelength, which is typically about 13.5 nm. Utilizing conventional lithography, the absorber stack is patterned to expose selected areas of the underlying ML reflector corresponding to the desired circuit layout. The remaining portions of the absorber stack absorb the EUV radiation. During EUV lithography, EUV light is projected through a system of mirrors onto the EUV mask at a slight angle relative to the mask surface normal (commonly referred to as an “angular exposure” or “off-axis illumination”). Reticle masking blades or, more simply, “REMA blades” are commonly included in the exposure system to block the extra radiation outside the active semiconductor devices. The light impinging upon the REMA blades is primarily absorbed; while the light impinging upon the exposed regions of the ML reflector is primarily reflected from the EUV mask onto a layer of photoresist, which is then utilized to impart the desired circuit layout to the semiconductor die. Leakage of EUV radiation occurs during exposure of adjacent dies. This primarily is caused by residual absorber reflectivity and REMA blade instability and out of band light reflections, resulting in over exposure around die edge impacting edge CD controls.
Due to the angular exposure utilized during EUV lithography, a shadow effect occurs wherein small portions of the incoming and outgoing EUV light are inadvertently blocked by the upper sidewall edges of the absorber pattern. As the severity of the shadow effect varies in relation to orientation of the absorber pattern relative to the EUV light, the shadow effect results in a horizontal-to-vertical bias in critical dimensions. The shadow effect can be minimized by reducing the thickness or height of the absorber film; however, this also reduces the absorptivity of the absorber material. Furthermore, this effect is additionally magnified near the edges of the semiconductor die due to the positional inaccuracies of the REMA blades. Additional unwanted EUV light from the REMA blades may reflect an undesirably high amount (e.g., 2-3%) of EUV light at the selected wavelength, in addition to a certain amount of out-of-band light near the periphery of the semiconductor device. Image resolution may thus become blurred or undesirably diffuse at the outer edges of an exposure reflected from the EUV mask. When semiconductor dies are sequentially printed utilizing such an EUV mask, the dies may be overexposed multiple times along their neighboring edges resulting in uncontrolled variations in the critical dimensions.
At least two solutions have been proposed to reduce the reflectivity of EUV masks along the regions surrounding the patterned area of the EUV mask by forming a non-reflective or “black” border around the die pattern area. In one proposed solution, the ML reflector is physically removed along die pattern border utilizing, for example, a plasma etch. While effectively eliminating reflectivity at the die pattern border, this solution requires the performance of multiple additional processing steps and entails the usage of aggressive etch chemistries, which can introduce defects into the EUV mask and reduce mask yield. In a second proposed solution, an additional light-absorbing layer is formed over the ML reflector along the die pattern border. This solution, however, requires the deposition and patterning of an additional film, which again adds undesired complexity, expense, and delay to the EUV mask fabrication process.
It would thus be desirable to provide embodiments of extreme ultraviolet mask fabrication process wherein the reflectivity of EUV light along the die pattern border is minimized in a manner that requires relatively few additional processing steps and which avoids the introduction of defects into the multi-layer reflector. It would further be desirable to provide embodiments of an extreme ultraviolet mask produced in accordance with such a method, as well as embodiments of a method suitable for fabricating a semiconductor device utilizing such an extreme ultraviolet mask. Other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended Claims, taken in conjunction with the accompanying Drawings and the foregoing Technical Field and Background.